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january 2012 ? 2011 fairchild semiconductor corporation www.fairchildsemi.com fpf1320 / fpf1321 ? rev. 1.0.0 fpf1320 / fpf1321 ? intellimax? dual-input single-output advanced power switch fpf1320 / fpf1321 intellimax? dual-input single-output advanced power switch with true reverse-current blocking features ? diso load switches ? input supply operating range: 1.5v ~ 5.5v ? r on 50m ? at v in =3.3v per channel (typical) ? true reverse-current blocking (trcb) ? fixed slew rate controlled 130s for < 1f c out ? i sw : 1.5a per channel (maximum) ? quick discharge feature on fpf1321 ? logic cmos io meets jesd76 standard for gpio interface and related power supply requirements ? esd protected: - human body model: >6kv - charged device model: >1.5kv - iec 61000-4-2 air discharge: >15kv - iec 61000-4-2 contact discharge: >8kv applications ? smart phones / tablet pcs ? portable devices ? near field communication (nfc) capable sim card power supply description the fpf1320/21 is a dual-input single-output (diso) load switch consisting of two sets of slew-rate controlled, low on-resist ance, p-channel mosfet switches and integrated analog features. the slew-rate- controlled turn-on characteristic prevents inrush current and the resulting excessive voltage droop on the power rails. the input voltage range operates from 1.5v to 5.5v to align with the requirements of low-voltage portable device power rails. fpf1320/21 performs seamless power-source transitions between two input power rails using the sel pin with advanced break- before-make operation. fpf1320/21 has a trcb function to block unwanted reverse current from output to input during on/off states. the switch is controlled by logic inputs of the sel and en pins, which are capable of interfacing directly with low-voltage control signals (gpio). fpf1321 has 65 ? on-chip load resistor for output quick discharge when en is low. fpf1320/21 is available in 1.0mm x 1.5mm wlcsp, 6-bump, with 0.5mm pitch. ordering information part number top mark channel switch per channel (typ.) at 3.3v in reverse current blocking output discharge rise time (t r ) package FPF1320UCX qs diso 50m ? yes na 130s 1.0mmx1.5mm wafer- level chip-scale package (wlcsp) 6- bumps, 0.5mm pitch fpf1321ucx qt diso 50m ? yes 65 ? 130s
? 2011 fairchild semiconductor corporation www.fairchildsemi.com fpf1320 / fpf1321 ? rev. 1.0.0 2 fpf1320 / fpf1321 ? intellimax? dual-input single-output advanced power switch application diagram figure 1. typical application block diagram turn-on slew rate controlled driver fpf1320/21 output discharge (optinal) v in a sel v out gnd trcb v in b trcb control logic turn-on slew rate controlled driver en figure 2. functional block diagram (out put discharge path for fpf1321 only)
? 2011 fairchild semiconductor corp oration www.fairchildsemi.com fpf1320 / fpf1321 ? rev. 1.0.0 3 fpf1320 / fpf1321 ? intellimax? dual-input single-output advanced power switch pin configuration figure 3. pin configuration in package view with pin 1 indicator a1 a2 b1 b2 c1 c2 v in a v in b gnd v out en sel a2 a1 b2 b1 c2 c1 v in a v in b gnd v out en sel top view bottom view figure 4. pin assignments pin description pin # name description a1 en enable input. active high. there is an internal pull-down resistor at the en pin. b1 sel input power selection inputs. see table 1 . there are internal pull-down resistors at the sel pins. a2 v in a supply input. input to the power switch a. b2 v out switch output c1 gnd ground c2 v in b supply input. input to power switch b. table 1. truth table sel en switch a switch b v out status low high on off v in a v in a selected high high off on v in b v in b selected x low off off floating for fpf1320 gnd for fpf1321 both switches are off
? 2011 fairchild semiconductor corporation www.fairchildsemi.com fpf1320 / fpf1321 ? rev. 1.0.0 4 fpf1320 / fpf1321 ? intellimax? dual-input single-output advanced power switch absolute maximum ratings stresses exceeding the absolute maximum ratings may dam age the device. the device may not function or be operable above the recommended operating conditions and stressi ng the parts to these levels is not recommended. in addition, extended exposure to stresses above the recomm ended operating conditions may affect device reliability. the absolute maximum ratings are stress ratings only. symbol parameters min. max. unit v in v in a, v in b, v sel , v en , v out to gnd -0.3 6 v i sw maximum continuous switch current per channel 1.5 a p d total power dissipation at t a =25c 1.2 w t stg operating and storage junc tion temperature -65 150 c ja thermal resistance, junction-to-ambient (1in. 2 pad of 2-oz. copper) 85 (1) c/w 110 (2) esd electrostatic discharge capability human body model, jesd22-a114 6.0 kv charged device model, jesd22-c101 1.5 air discharge (v in a , v in b to gnd), iec61000-4-2 system level 15.0 contact discharge (v in a , v in b to gnd), iec61000-4-2 system level 8.0 notes: 1. measured using 2s2p jedec std. pcb. 2. measured using 2s2p jedec pcb cold-plate method. recommended operating conditions the recommended operatin g conditions table defines the conditions for act ual device operation. recommended operating conditions are specified to ens ure optimal performance to the datasheet specificatio ns. fairchild does not recommend exceeding them or designing to absolute maximum ratings. symbol parameters min. max. unit v in input voltage on v in a, v in b 1.5 5.5 v t a ambient operating temperature -40 85 c
? 2011 fairchild semiconductor corporation www.fairchildsemi.com fpf1320 / fpf1321 ? rev. 1.0.0 5 fpf1320 / fpf1321 ? intellimax? dual-input single-output advanced power switch electrical characteristics v in a=v in b=1.5 to 5.5v, t a =-40 to 85c unless otherwise noted. typical values are at v in a=v in b=3.3v and t a =25c. symbol parameters condition min. typ. max. unit basic operation v in a, v in b input voltage 1.5 5.5 v i sd shutdown current sel=high or low, en=gnd, v out =gnd, v in a=v in b=5.5v 5 a i q quiescent current i out =0ma, sel=high or low, en=high, v in a=v in b=5.5v 12 22 a r on on-resistance v in a=v in b=5.5v, i out =200ma, t a =25c 42 60 m ? v in a=v in b=3.3v, i out =200ma, t a =25c 50 v in a=v in b=1.8v, i out =200ma, t a =25c to 85c 80 v in a=v in b=1.5v, i out =200ma, t a =25c 170 v ih sel, en input logic high voltage v in a, v in b=1.5v ? 5.5v 1.15 v v il sel, en input logic low voltage v in a , v in b=1.8v ? 5.5v 0.65 v sel, en input logic low voltage v in a , v in b=1.5v ? 1.8v 0.60 v droop_out output voltage droop while channel switching from higher input voltage lower input voltage (3) v in a=3.3v, v in b=5v, switching from v in a ? v in b, r l =150 ? , c out =1f 100 mv i sel /i en input leakage at sel and en pin 1.2 a r sel_pd /r en_pd pull-down resistance at sel or en pin 7 m ? r pd output pull-down resistance sel=high or low, en=gnd, i force =20ma, t a =25c, fpf1321 65 ? true reverse current blocking v t_rcb rcb protection trip point v out - v in a or v in b 45 mv v r_rcb rcb protection release trip point v in a or v in b -v out 25 mv i rcb v in a or v in b current during rcb v out =5.5v, v in a or v in b=short to gnd 9 15 a t rcb_on rcb response time when device is on (3) v in a or v in b=5v, v out v ina , b =100mv 5 s continued on the following page?
? 2011 fairchild semiconductor corporation www.fairchildsemi.com fpf1320 / fpf1321 ? rev. 1.0.0 6 fpf1320 / fpf1321 ? intellimax? dual-input single-output advanced power switch electrical characteristics (continued) v in a=v in b=1.5 to 5.5v, t a =-40 to 85 c unless otherwise noted. typical values are at v in a=v in b=3.3v and t a =25 c. symbol parameters condition min. typ. max. unit dynamic characteristics t don turn-on delay (4) v in a or v in b=3.3v, r l =150 ? , c l =1f, t a =25c, sel: high, en: low ? high 120 s t r v out rise time (4) 130 s t on turn-on time (6) 250 s t doff turn-off delay (4) v in a or v in b=3.3v, r l =150 ? , c l =1f, t a =25c, sel: high, en: high ? low 15 s t f v out fall time (4) 320 s t off turn-off time (7) 335 s t doff turn-off delay (4,5) v in a or v in b =3.3v, r l =150 ? , c l =1f, t a =25c, sel: high, en: high ? low, output discharge mode, fpf1321 6 s t f v out fall time (4,5) 110 s t off turn-off time (5,7) 116 s t tranr transition time low ? high (4) v in a=3.3v, v in b=5v, switching from v in a ? v in b, sel: low ? high, en: high, r l =150 ? , c l =1f, t a =25c 3 s t slh switch-over rising delay (4) 1 s t tranf transition time high ? low (4) v in a=3.3v, v in b=5v, switching from vinb ? v in a, sel: high ? low, en: high, r l =150 ? , c=1f, t a =25c 45 s t shl switch-over falling delay (4) 5 s notes: 3. this parameter is guaranteed by design and characterization; not production tested. 4. t don /t doff /t r /t f /t tranr /t tranf /t slh /t shl are defined in figure 5. 5. fpf1321 output discharge is enabled during off. 6. t on =t r + t don . 7. t off =t f + t doff .
? 2011 fairchild semiconductor corporation www.fairchildsemi.com fpf1320 / fpf1321 ? rev. 1.0.0 7 fpf1320 / fpf1321 ? intellimax? dual-input single-output advanced power switch timing diagram figure 5. dynamic behavior timing diagram
? 2011 fairchild semiconductor corporation www.fairchildsemi.com fpf1320 / fpf1321 ? rev. 1.0.0 8 fpf1320 / fpf1321 ? intellimax? dual-input single-output advanced power switch typical characteristics figure 6. supply current vs. temperature figure 7. supply current vs. supply voltage figure 8. shutdown current vs. temperature fi gure 9. shutdown current vs. supply voltage figure 10. r on vs. temperature figure 11. r on vs. supply voltage continued on the following page?
? 2011 fairchild semiconductor corporation www.fairchildsemi.com fpf1320 / fpf1321 ? rev. 1.0.0 9 fpf1320 / fpf1321 ? intellimax? dual-input single-output advanced power switch typical characteristics figure 12. v il vs. temperature figure 13. v il vs. supply voltage figure 14. v ih vs. temperature figure 15. v ih vs. supply voltage figure 16. v ih / v il vs. supply voltage figure 17. r sel_pd and r en_pd vs. temperature continued on the following page?
? 2011 fairchild semiconductor corporation www.fairchildsemi.com fpf1320 / fpf1321 ? rev. 1.0.0 10 fpf1320 / fpf1321 ? intellimax? dual-input single-output advanced power switch typical characteristics figure 18. r sel_pd and r en_pd vs. supply voltage figure 19. t don and t doff vs. temperature figure 20. t r and t f with fpf1320 vs. temperature figure 21. t r and t f with fpf1321 vs. temperature figure 22. transition time vs. temperature figure 23. switch over time vs. temperature continued on the following page?
? 2011 fairchild semiconductor corporation www.fairchildsemi.com fpf1320 / fpf1321 ? rev. 1.0.0 11 fpf1320 / fpf1321 ? intellimax? dual-input single-output advanced power switch typical characteristics figure 24. trcb trip and release vs. temperature figure 25. i rcb vs. temperature figure 26. r pd with fpf1321 vs. temperature figure 27. turn-on response (v in a=3.3v, c in =1f, c out =1f, r l =150 ? , sel=lo) figure 28. turn-off response with fpf1320 (v in a=3.3v, c in =1f, c out =1f, r l =150 ? , sel=low) figure 29. turn-off response with fpf1321 (v in a=3.3v, c in =1f, c out =1f, r l =150 ? sel=low) continued on the following page?
? 2011 fairchild semiconductor corporation www.fairchildsemi.com fpf1320 / fpf1321 ? rev. 1.0.0 12 fpf1320 / fpf1321 ? intellimax? dual-input single-output advanced power switch typical characteristics figure 30. power source transition from 3.3v to 5v (v in a=3.3v, v in b=5v, c in =1f, c out =1f, r l =150 ? ) figure 31. power source transition from 5v to 3.3v (v in a=3.3v, v in b=5v, c in =1f, c out =1f, r l =150 ? ) figure 32. trcb during off (v in a=v in b=floating, v out =5v, c in =1f, c out =1f, en=low, no r l ) figure 33. trcb during on (v in a=5v, v out =6v, c in =1f, c out =1f, en=high, no r l )
? 2011 fairchild semiconductor corporation www.fairchildsemi.com fpf1320 / fpf1321 ? rev. 1.0.0 13 fpf1320 / fpf1321 ? intellimax? dual-input single-output advanced power switch operation and application description the fpf1320 and fpf1321 are dual-input single-output power multiplexer switches with controlled turn-on and seamless power source transition. the core is a 50m ? p-channel mosfet and controller capable of functioning over a wide input operating range of 1.5v to 5.5v per channel. the en and sel pins are active- high, gpio/cmos-compatible input. they control the state of the switch and inpu t power source selection, respectively. trcb functionality blocks unwanted reverse current during both on and off states when higher v out than v in a or v in b is applied. fpf1321 has a 65 ? output discharge path during off. input capacitor to limit the voltage drop on the input supply caused by transient inrush current when the switch turns on into a discharged load capacitor; a capacitor must be placed between the v in a or v in b pins to the gnd pin. at least 1f ceramic capacitor, c in , placed close to the pins, is usually sufficient. higher-value c in can be used to reduce more the voltage drop. inrush current inrush current occurs when the device is turned on. inrush current is dependent on output capacitance and slew rate control capability, as expressed by: load r initial in out inrush i t v v c i ? ? ? ? (1) where: c out : output capacitance; t r : slew rate or rise time at v out ; v in : input voltage, v in a or v in b; v initial : initial voltage at c out , usually gnd; and i load : load current. higher inrush current causes higher input voltage drop, depending on the distributed input resistance and input capacitance. high inrush current can cause problems. fpf1320/1 has a 130s of slew rate capability under 3.3v in at 1f of c out and 150 ? of r l so inrush current and input voltage drop can be minimized. power source selection input power source selectio n can be controlled by the sel pin. when sel is low, output is powered from v in a while sel is high, v in b is powering output. the sel signal is ignored during device off. output voltage drop during transition output voltage drop usually occurs during input power source transition period from low voltage to high voltage. the drop is highly dependent on output capacitance and load current. fpf1320/1 adopts an advanced break-before-make control, which can result in minimized output voltage drop during the transition time. output capacitor capacitor c out of at least 1f is highly recommended between the v out and gnd pins to achieve minimized output voltage drop during input power source transition. this capacitor also prevents parasitic board inductance. true reverse-current blocking the true reverse-current blocking feature protects the input source against current flow from output to input regardless of whether the load switch is on or off. board layout for best performance, all traces should be as short as possible. to be most effe ctive, the input and output capacitors should be placed close to the device to minimize the effect that par asitic trace inductance on normal and short-circuit operation. wide traces or large copper planes for power pins (v in a, v in b, v out and gnd) minimize the parasitic electrical effects and the thermal impedance.
? 2011 fairchild semiconductor corporation www.fairchildsemi.com fpf1320 / fpf1321 ? rev. 1.0.0 14 fpf1320 / fpf1321 ? intellimax? dual-input single-output advanced power switch physical dimensions figure 34. 6 ball, 1.0 x 1.5mm, wafe r-level chip-scale package (wlcsp) product-specific dimensions product d e x y FPF1320UCX 1460m+/-30m 960m+/-30m 230m 230m fpf1321ucx 1460m+/-30m 960m+/-30m 230m 230m package drawings are provided as a service to customers consi dering fairchild components. drawings may change in any manner without notice. please note the revision and/or date on the drawi ng and contact a fairchild semiconductor representative to ver ify or obtain the most recent revision. package specifications do not expand the terms of fairchild?s worldwide terms and conditions, specifically the warranty therein, which covers fairchild products. always visit fairchild semiconductor?s online packagi ng area for the most recent package drawings: http://www.fairchildsemi.com/packaging/ . bottom view side views recommended land pattern ball a1 index area seating plane a1 f (nsmd pad type) (?0.350) solder mask opening (x) 0.018 (y) 0.018 (?0.250) cu pad 0.06 c 0.05 c e d f notes: a. no jedec registration applies. b. dimensions are in millimeters. c. dimensions and tolerance per asmey14.5m, 1994. d. datum c is defined by the spherical crowns of the balls. e. package nominal height is 582 microns 43 microns (539-625 microns). f. for dimensions d, e, x, and y see product datasheet. g. drawing filname: mkt-uc006afrev2. 0.03 c 2x 0.03 c 2x ?0.315 +/- .025 6x 1 2 a b c 0.3320.018 0.2500.025 d e (1.00) (0.50) 0.005 cab 0.50 0.50 1.00 0.625 0.539 top view b a c
? 2011 fairchild semiconductor corporation www.fairchildsemi.com fpf1320 / fpf1321 ? rev. 1.0.0 15 fpf1320 / fpf1321 ? intellimax? dual-input single-output advanced power switch
? 2011 fairchild semiconductor corporation www.fairchildsemi.com fpf1320 / fpf1321 ? rev. 1.0.0 16 fpf1320 / fpf1321 ? intellimax? dual-input single-output advanced power switch

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